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| == Hardware Architecture of the Geneve 9640 == | | == Hardware Architecture of the Geneve 9640 == |
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| === Mapper ===
| | [[Geneve paged memory organization]] |
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| Mapping in the Geneve is organized in portions of 8 KiB. Each such portion is called a page, and a page is identified by a number from 0 to 255. Accordingly, the complete physical address space has a size of 2048 KiB or 2 MiB.
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| In order to map a part of physical address space into the logical address space, the page number of the desired memory page must be loaded into the mapper. The logical address space has a size of 64 KiB, so we see up to eight pages at the same time. The mapper is available in the logical address space as 8 consecutive byte addresses, each of which determines which page is shown in which address range.
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| Although a page can be made visible at any 8 KiB logical address range, programs usually make use of absolute addresses, so they are only correctly executable if the page is mapped at the intended logical position. Pages which contain only non-executed data may be used at any location.
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| {| class="plain"
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| ! MDOS mode
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| ! TI mode
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| ! Logical address range
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| |-
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| | F110
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| | 8000
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| | 0000 - 1FFF
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| |-
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| | F111
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| | 8001
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| | 2000 - 3FFF
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| |-
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| | F112
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| | 8002
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| | 4000 - 5FFF
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| |-
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| | F113
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| | 8003
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| | 6000 - 7FFF
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| |-
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| | F114
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| | 8004
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| | 8000 - 9FFF
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| |-
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| | F115
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| | 8005
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| | A000 - BFFF
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| |-
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| | F116
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| | 8006
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| | C000 - DFFF
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| |-
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| | F117
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| | 8007
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| | E000 - FFFF
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| |}
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| === Memory Map ===
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| The page numbers are directly related to physical memory locations. Precisely, the complete physical address is created by retrieving the page number indexed by the uppermost three bits of the logical address, adding the 13 bit suffix of the logical address, which in total creates a 21-bit address (16 bits - 3 bits + 8 bits).
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| The rightmost three bits of the page number are the head of the address, routed over the A0-A2 address lines. The next three bits are called AMA, AMB, and AMC. These lines are available in the [[TI-99 Peripheral Expansion Box|Peripheral Expansion Box]], but they are not routed through the [[TI-99_Peripheral_Expansion_Box#Peripheral_Box_Slot_Concept|Flex Cable Interface]], so a TI-99/4A console cannot change their value. A Geneve, on the other side, can actually operate these lines. Peripheral Box expansion cards are required to check for AMA=AMB=AMC=1, which is the level that is present for an attached TI. Unfortunately, some third-party cards do not check for this state and cause mirroring of their address space when accessed by a Geneve.
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| The leftmost two bits of the page number are the (pseudo) address lines AMD and AME, which are not available in the standard P-Box. However, the [[Geneve_9640#GenMod|GenMod]] Geneve modification grabs two rarely used lines and redefines them as AMD and AME. This way, the complete memory address space can be routed through the P-Box.
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| {|
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| ! AME
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| ! AMD
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| ! AMC
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| ! AMB
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| ! AMA
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| ! A0
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| ! A1
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| ! style="padding-right:2em;" | A2
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| ! style="padding-right:3em;" | A3-A15
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| ! style="padding-right:3em; text-align:left;" | pages
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| ! style="padding-right:3em; text-align:left;" | size
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| ! style="text-align:left;" | meaning
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| |-
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| | 0 || 0 || . || . || . || . || . || . || address || 00..3f || 512 || on-board dram
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| |-
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| | 0 || 1 || . || . || . || . || . || . || address || 40..7f || 512 || on-board future expansion or Memex with Genmod
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| |-
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| | 1 || 0 || 0 || . || . || . || . || . || address || 80..9f || 256 || p-box
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| |-
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| | 1 || 0 || 1 || 0 || . || . || . || . || address || a0..af || 128 || p-box
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| |-
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| | 1 || 0 || 1 || 1 || 0 || . || . || . || address || b0..b7 || 64 || p-box
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| |-
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| | 1 || 0 || 1 || 1 || 1 || 0 || 0 || 0 || address || b8 || 8 || Peripheral cards address block 0000-1fff
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| |-
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| | 1 || 0 || 1 || 1 || 1 || 0 || 0 || 1 || address || b9 || 8 || Peripheral cards address block 2000-3fff
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| |-
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| | 1 || 0 || 1 || 1 || 1 || 0 || 1 || 0 || address || ba || 8 || Peripheral cards address block 4000-5fff
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| |-
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| | 1 || 0 || 1 || 1 || 1 || 0 || 1 || 1 || address || bb || 8 || Peripheral cards address block 6000-7fff
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| |-
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| | 1 || 0 || 1 || 1 || 1 || 1 || 0 || 0 || address || bc || 8 || Peripheral cards address block 8000-9fff
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| |-
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| | 1 || 0 || 1 || 1 || 1 || 1 || 0 || 1 || address || bd || 8 || Peripheral cards address block a000-bfff
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| |-
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| | 1 || 0 || 1 || 1 || 1 || 1 || 1 || 0 || address || be || 8 || Peripheral cards address block c000-dfff
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| |-
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| | 1 || 0 || 1 || 1 || 1 || 1 || 1 || 1 || address || bf || 8 || Peripheral cards address block e000-ffff
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| |-
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| | 1 || 1 || 0 || . || . || . || . || . || address || c0..df || 256 || on-board sram expansion
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| |-
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| | 1 || 1 || 1 || 0 || 0 || . || . || . || address || e0..e7 || 64 || on-board sram expansion
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| |-
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| | 1 || 1 || 1 || 0 || 1 || 0 || . || . || address || e8..eb || 32 || on-board sram expansion
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| |-
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| | 1 || 1 || 1 || 0 || 1 || 1 || . || . || address || ec..ef || 32 || on-board sram default
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| |-
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| | 1 || 1 || 1 || 1 || . || . || . || 0 || address || f0,2,4,..,e || 8 || on-board boot eprom 1
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| |-
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| | 1 || 1 || 1 || 1 || . || . || . || 1 || address || f1,3,5,..,f || 8 || on-board boot eprom 2
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| |}
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| The TI console (or more precise, the Flex Cable Interface) sets the AMA/B/C
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| lines to 1. Most cards actually check for AMA/B/C=1. However, this decoding
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| was forgotten in some designs which cause the card memory to be mirrored. The
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| usual DSR space at 0x4000-0x5fff which would be reachable via page 0xba is then
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| mirrored on a number of other pages:
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| 10 xxx 010x = 82, 8a, 92, 9a, a2, aa, b2, ba
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| Another block to take care of is 0xbc which covers 8000-9fff since this
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| area contains the speech synthesizer port at 9000/9400.
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| For the standard Geneve, only prefix 10 is routed to the P-Box. The Genmod
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| modification wires these address lines to pins 8 and 9 in the P-Box as AMD and
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| AME. This requires all cards to be equipped with an additional selection logic
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| to detect AMD=0, AME=1. Otherwise these cards, although completely decoding the
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| 19-bit address, would reappear at 512 KiB distances.
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| For the page numbers we get
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| standard:
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| 00-3f are internal (DRAM)
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| 40-7f are internal expansion, never used
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| 80-bf are the P-Box address space
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| c0-ff are internal (SRAM, EPROM)
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| Genmod:
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| 00-3f are the P-Box address space
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| 40-7f are the P-Box address space
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| 80-bf are the P-Box address space
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| c0-ef are the P-Box address space
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| f0-ff are internal (EPROM)
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The common TI-99 setup comprises the console, and peripheral devices. In earlier years, peripheral devices like interfaces, memory expansion, or speech synthesizer were hooked next to each other at the peripheral port on the right side of the console, building up a chain of boxes which stretched beyond the ends of your desk (the Sidecar setup). Later, peripheral extensions were put into the Peripheral Expansion Box (PEB).
Hardware Architecture of the TI-99/4A
The TI-99/4A is a microcomputer system driven by one TMS9900 microprocessor.
The address bus is 16 bit wide, allowing for a maximum of 64 KiB of directly accessible memory, consisting of ROM, RAM, and special ports.
The data bus is 16 bit wide. However, most peripheral devices outside the console were connected by an 8 bit bus using a 16/8 bit converter (splitting one word in subsequent two bytes and vice versa). This led some people to falsely believe that the TI-99/4A was an 8-bit system (or "not a true 16 bit system").
One special feature of the TMS9900 processor (and comparable processors of this family) was that there are no hardware registers available for user programs. Instead, the TMS9900 uses a pointer to a set of 16 software registers with 16 bit width each in RAM. This workspace pointer (WP) may be set by user programs and allows to quickly replace the complete set of 16 registers which is especially useful for modular programming. Programs could allocate their own workspace area, move the WP to this area, and thus avoid to interfere with other programs.
In the TI home computer system family there was also a concept of port-based memory addressing. This allowed to considerably increase the useable memory by introducing new address spaces. Three of these memories are available:
- Video memory: 16 KiB
- GROM memory: 64 KiB (multiple ports allow to multiply this size)
- Speech memory (within the Speech Synthesizer)
Hardware Architecture of the Geneve 9640
Geneve paged memory organization