Terminology

All references to TI-99/4A also apply to TI-99/4 unless stated otherwise.

C

Communications Register Unit: serial interface embedded in TMS processors

Context switch: Operation of TMS processors. The execution context is defined as the Workspace,the current execution location, and the status flags. By a context switch, the workspace pointer, the program counter, and the status register are loaded with new values corresponding to the new context. A context switch simplifies modular programming in assembly language. There are three machine lanuage operations that perform context switches: BLWP (branch and load workspace pointer), XOP (extended operation), and RTWP (return with workspace pointer). Apart from those, two more kinds of context switches appear: the initial context switch to the values stored at >0000, and interrupts that are services by an ISR.

CRU: short for Communications Register Unit

D

Device Service Routine: Program that is provided for accessing a peripheral device; would be called a driver in common terminology. The DSR defines device names and functions to operate the device on a higher level, abstracting from the hardware details. There are utility functions in the BASIC ROM and for assembly language programs to facilitate accessing the DSR of a device given by name (DSRLNK). The DSR is usually stored in a ROM circuit that is included on the PCB of the expansion card. Each card may be selected by a CRU operation which leads to the DSR being mapped into the CPU address space. The common region for DSRs is >4000 to >5fff. On the Geneve, DSRs are also included as parts of the MDOS operating system, replacing the fixed DSRs on the ROMs.

DSR: see Device Service Routine

E

Editor/Assembler: The standard development environment for assembly language programs on the TI-99/4A. Consists of a cartridge and two diskettes; the cartridge provides a menu to select the editor, the assembler, and to load programs, and the diskettes contain the actual editor and assembler programs that are loaded by the cartridge.

Endianness: Determines the order of bytes within words. Big-endian architectures have the higher-order byte at address x and the lower-order byte at x+1. Little-endian system have the lower-order byte at x and the higher-order byte at x+1. May also determine the bit order in a byte or word, where a big-endian bit order means that bit 0 has highest value, while bit 7 or bit 15 has lowest value. The TI systems are big-endian with respect to both multi-byte words and bit order.

Extended Basic: Popular BASIC environment which is downward compatible (with some few exceptions) to TI BASIC and provided on a cartridge. Extended Basic allows for using advanced programming structures, provides sprites, introduces more commands and subprograms, and can make use of a memory expansion. Time-critical parts of the interpreter are provided in machine language in the CPU address space which noticeably increases performance to the built-in TI BASIC.

F

Firehose cable: Nickname for the Flex Cable Interface

Flex Cable Interface: Card, cable, and plug that connect the TI-99/4A console with the Peripheral Expansion Box. The Flex Cable Interface's card was usually plugged into slot 1 of the P-Box.

G

GPL: Short for Graphics Programming Language.

Graphics Programming Language: Programming language at assembly language level, executed by a virtual machine called GPL interpreter or Monitor. GPL is designed as a language for an 8-bit architecture and stored within GROMs. Due to the fact that GPL must be interpreted, the performance is poor compared to native machine language, yet still much faster than BASIC. The reasons for defining this language may be that Texas Instruments faced the problem that TI BASIC and other applications in Command Modules (cartridges) became too large to fit into the available areas of the CPU address space, so they made use of special memory devices called GROMs which had a higher capacity than available ROM chips, yet within a smaller package. Other theories say that GPL was one means of controlling software development from third parties. The language has no specific graphic features despite its name, but possibly it was named after the location where it is stored (GROMs).

Graphics Read-Only Memory: Read-only memory (ROM) circuit, packaged in a 16-pin DIP package. A GROM has a storage capacity of 6 KiB. It does not have separate address and data lines; instead, an address must first be set by putting two bytes on the data lines with the address mode pin selected. Then, data can be sequentially read from the same lines in data mode. GRAM circuits are mentioned in the Editor/Assembler manual in the context of accessing, but no real devices have been seen in the wild. GROMs have special control lines that are intended to be driven by the TMS9918 video processor (or compatibles) so it seems as if GROMs were originally designed to hold static video content.

GROM: Short for Graphics Read-only memory.

I

Interrupt Service Routine: Portion of code which is called in response to an interrupt. The main ISRs are found in the console ROM and are called when VDP interrupts occur. Peripheral expansion cards like the serial interface may define own ISRs. An ISR has similarities with DSRs as it is usually invoked via a context switch, but usually not by a command but by the definition within the CPU.

ISR: see Interrupt Service Routine

P

P-Box: short for Peripheral Expansion System Box or Peripheral Expansion Box

S

Sprite: Graphic feature of the VDP at the size of one character, four, or sixteen which can be moved freely on the screen. Occupies an own layer in the display. At most, 32 sprites can be displayed on the screen. While rendering lines, the TMS9918 VDP only considers four layers per row, which means that a fifth sprite becomes partly or completely invisible where four sprites with smaller number already show in the line.

V

V9938: VDP used on the Geneve or on graphical enhancement cards ("80-column cards"). Offers more graphics modes and can handle up to 192 KiB of memory.

VDP: Short for Video Display Processor.

Video Display Processor: Co-processor in TI systems dedicated to render the display contents and to output to a display device.

W

Workspace: Set of 16 workspace registers. The TMS9900/9995 processors do not have user-defined registers within the processor but make use of external RAM for their registers. This allows to use context switches, but also slows down execution considerably. The current workspace is defined by the processor register WP (workspace pointer). Choosing a new workspace just amounts to loading a new value into this register. The workspace pointer points to the location of the high byte of register 0.